Linked to here:
https://01.org/intel-kgt/blogs or https://01.org/intel-kgt/blogs/bzhu5/2015/coreos-ikgt
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Showing posts with label Hypervisor. Show all posts
Showing posts with label Hypervisor. Show all posts
Tuesday, June 09, 2015
Friday, November 21, 2014
Defending Against ret2dir Attacks (partially) with Virtualization Technology?
I was so excited when recently reading the paper (ret2dir: Rethinking Kernel Isolation) from Vasileios P. Kemerlis. This post is basically going to introduce the idea of ret2dir attack, and how to prevent such an attack with hardware virtualization technology, actually partially.
Labels:
Hypervisor,
Kernel,
Memory,
ret2dir,
ret2usr,
Security,
Virtualization
Wednesday, November 12, 2014
How to Implement a software-based SMEP(Supervisor Mode Execution Protection) with Virtualization/Hypervisor Technology
As my previous post indicated, SMEP is a powerful security feature, and easy to deploy in modern commodity OS. However this feature requires H/W processor's support, for those processors that are not SMEP-capable, this post presents a software-based solution to emulate SMEP functionality with the help of Virtualization/Hypervisor technology.
Saturday, November 08, 2014
Using LBR (Last Branch Record) Feature to Detect IDT-Shadowing-Based Malicious IDT Hooking
Thanks to Yushi who shared a presentation (ELI: Bare-Metal Performance for I/O Virtualization) with me. In that hypervisor (ELI), it innovates an idea of gust IDT shadow (or IDT virtualization) design for some specific usage models. I'm going to talk a little bit about this idea.
Labels:
Hypervisor,
IDT hooking,
LBR,
Security,
Virtualization
Thursday, November 06, 2014
Monitor Trap Flag (MTF) Usage in EPT-based Guest Physical Memory Monitoring
Monitor Trap Flag (MTF) is a flag specifically designed for single-stepping in x86/Intel hardware virtualization VT-x technology. When MTF is set, the guest will trigger a VM Exit after executing each instruction (need to consider NMI or other interrupt delivery boundary). This paper presents an idea to use MTF for memory write allowing when monitoring modification to guest virtual-to-physical mapping (page table entries) tables.
Wednesday, November 05, 2014
BitVisor - A Thin Hypervisor Built for Enforcing I/O Device Security - Storage (USB/DISK) Encryption or File Access Monitoring
This post is wrote to share an idea of the paper (BitVisor: A Thin Hypervisor for Enforcing I/O Device Security) that I read recently. It innovates a hypervisor-based solution for enforcing storage/disk encryption of ATA devices.
Tuesday, November 04, 2014
XEN PVH Virtualization Mode - "What Color Is Your Xen?"
In my previous post Why smaller code size with XEN on ARM?, one of reasons I explained is that XEN on x86 must support different guest working modes with backward compatibility due to historical x86 virtualization technology limitations (e.g. in the first x86 VT-x version, no hardware-assisted Paging support). This post just shares some useful information/links on a new XEN virtualization mode (PVH) I read recently.
Monday, November 03, 2014
Unikernels: Library Operating Systems for the Cloud (OSv)
Unlike a general-purpose, commercial operating system (like Windows, Ubuntu), OSv (http://osv.io/ from cloudius-systems) is a single-purpose operating system. It is also kind of library operating system designed for the cloud that running on top of different hypervisors, e.g. XEN, KVM, VMware. So what does OSv like look?
Debugging Bug Check (BSOD) 0x101 CLOCK_WATCHDOG_TIMEOUT in a Hypervisor/VMM Environment
I'm planning to write a post for debugging Bug Check 0x101 issue (CLOCK_WATCHDOG_TIMEOUT) in Windows system. but I happened to find this blog Debugging a CLOCK_WATCHDOG_TIMEOUT Bugcheck from MSFT debugger team which explaned it in greater details. However, the issue we met is slightly different from what MSFT team was debugging. We are working in virtualization/hypervisor environment, and Windows (7+) is running as a primary Guest OS.
Friday, October 17, 2014
Enable UEFI Firmware BIOS and Debug Xen/EFI on VMware Player
Since VMware product (e.g. Player) now supports nested virtualization VT-x/VMX , recently I wanted to use this feature to debug XEN w/ EFI on top of VMware Player. This post details some best practices, and some issues I encountered.
Sunday, September 28, 2014
Why smaller code size with XEN on ARM?
This white paper (Xen ARM with Virtualization Extensions whitepaper) indicates that "Xen on ARM is 1/6 of the code size of x86_64 Xen, while still providing a similar level of features". what does this mean? Does this mean that Xen/ARM is better than Xen/x86? We cannot simply just make this conclusion, but anyway smaller code size means smaller TCB, which can reduce security risks (e.g. security vulnerabilities).
Labels:
AMD-v,
ARM,
Hypervisor,
Virtualization,
VMM,
VT-x,
x86,
XEN
Friday, August 15, 2014
Monitor/Trap Software Interrupt INT 80h (System Call) with x86/Intel Virtualization Technology
In an unix-like system, before syscall/sysret and/or sysenter/sysexit instructions were introduced by x86/Intel processors, software interrupt "INT 80h" was used as system call interface. Unlike my previous post, this one is going to talk about how to monitor this old type system call.
Labels:
Hypervisor,
INT 0x80,
Interrupt,
Monitor,
syscall,
Virtualization,
VMM,
VT-x
Friday, April 11, 2014
Yet Another Solution to Monitor/Trap SYSCALL with Virtualization Technology (x86)
This article describes an idea to monitor SYSCALL with x86 Hardware Virtualization Technology. It doesn't require visible guest code/data modification, so that in some cases, even Kernel Patch Protection (e.g. Windows x64 PatchGuard) cannot detect it. Here the SYSCALL could also be SYSENTER or INT 80h for system calls.
Labels:
Exception,
Hypervisor,
syscall,
Virtualization,
x86
Wednesday, April 02, 2014
Thoughts on VMXON and VMCS regions in VT-x (from security's point of view)
Previously when I was working on a Hypervisor based on Intel VT-x. I always did exactly as what I'm told to do in the VT-x specification when programing VMM software.
But now I'm going to revisit this again starting by asking these questions: What if I won't do it as what we're told to do? Is Intel VT-x exploitable? Can we find vulnerabilities in hardware VT-x implementation? Is it possible to do "reverse-engineering" to get internals on VT-x CPU implementation? Can we take advantage of VT-x to attack other privileged resource? Can we bypass EPT layer? However, those are just some open questions, I don't have answers either, but it has a lot of fun when you look into it.
But now I'm going to revisit this again starting by asking these questions: What if I won't do it as what we're told to do? Is Intel VT-x exploitable? Can we find vulnerabilities in hardware VT-x implementation? Is it possible to do "reverse-engineering" to get internals on VT-x CPU implementation? Can we take advantage of VT-x to attack other privileged resource? Can we bypass EPT layer? However, those are just some open questions, I don't have answers either, but it has a lot of fun when you look into it.
Labels:
Bypass,
Hypervisor,
Virtualization,
VMM,
Vulnerability
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